1. Technical Field
The present invention relates in general to digital data storage, and in particular to speculative data reads. Still more particularly, the present invention relates to a method for speculatively reading data from a disk drive determined by a position of a read/write head and a nature of earlier requested data.
2. Description of the Related Art
Digital computers perform two main internal functions. They store software (i.e., instructions and data are stored in registers, buffers, caches, primary and secondary memory) and they manipulate that software (i.e., the computer performs arithmetic operations, heuristic operations, data conversion and other processes in an appropriate execution unit such as an adder, shifter, etc.). While much of the processing speed of a computer is based on central processor and internal bus speeds, a major factor limiting the speed of the computer is the length of time it takes to supply instructions and data to an execution unit. This length of time is in part a function of the hierarchical position and physical speed of a memory containing the required instructions/data.
The hierarchical position of a memory refers to how logically close the memory is to the execution unit. Data/instructions cannot skip over hierarchical levels, but must pass from one level through the next until they reach the execution unit.
The physical speed of the memory is a function of the memory's physical structure. Memory in a semiconductor is limited by circuit speeds, while the speed of memory in secondary memory is primarily limited by a mechanical movement of a disk and/or read/write head.
A typical memory hierarchy is depicted in FIG. 1. Memory that is higher in the memory hierarchy (closer to the central processing unit—CPU) tends to be faster, more expensive and of a smaller capacity, while memory lower in the memory hierarchy tends to be slower, cheaper and of a larger capacity. For example, in a computer 100, a CPU 102 includes a processor core 104, which typically has an on-board Level-one (L1) cache 108. L1 Cache 108 is typically made up of very fast Static Random Access Memory (SRAM). (Processor core 104 also has on-board queues 106, which are extremely fast registers/latches the pass instructions/data to execution units in the processor core 104. However, although queues, registers and latches briefly store instructions and data, they typically are not associated with a memory hierarchy.)
Also in the CPU 102, but typically not within the processor core 104, is a Level-two (L2) cache 110. Off-board the CPU 102 is a Level-three (L3) cache 112. L2 cache 110 and L3 cache 112, like L1 cache 108, are typically SRAM's. L3 cache 112 is connected, via a system bus 111, to a system memory 113, which is typically a Dynamic Random Access Memory (DRAM), which is slower than SRAM. System memory 113 is connected, via an input/output (I/O) bus 124, to a secondary memory 116, which may be a floppy disk drive, a Compact Disk-Read Only Memory (CD-ROM) drive, a Digital Video Disk (DVD) drive, Zip drive, or a hard disk drive storage device.
Secondary memory is much slower than other memories in the memory hierarchy. This is due primarily to the fact that secondary memory has a mechanical component that the other memories do not. That is, while other memories are essentially limited by how long it take transistors that make up the memories to turn off and on, secondary memory requires physical movement of a read-write head, optical sensor, or other mechanical device to read data off the rotating storage medium (hard disk, CD-ROM, floppy, DVD, etc.)
Typically, data is retrieved from a secondary storage device in units that represent a logical group of data. For example, data is retrieved from a disk drive by first specifying the logical block address (LBA) of the first block of data, and the number of blocks in the record. Information is then streamed from the disk drive to the disk controller until the last logical block sent. The disk drive then waits for another read command with its LBA and the number of blocks to be transferred. Such a method and system limits the speed of data transfer primarily by the mechanical characteristics of the storage device. Thus, in a disk drive, significant time is lost while the drive is waiting for the next required LBA.
Therefore, there is a need for a method that increases the access speed of a secondary storage device by avoiding “down time” waiting for a next data transfer command.